Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAMV71J20/DACC/IMR#0x0
Interrupt Mask Register
Transmit Ready Interrupt Mask of channel 0
Transmit Ready Interrupt Mask of channel 1
End of Conversion Interrupt Mask of channel 0
End of Conversion Interrupt Mask of channel 1
https://github.com/cmsis-svd/cmsis-svd-data